Integer and Floating-Point Constant Multipliers for FPGAs - ENS de Lyon - École normale supérieure de Lyon
Communication Dans Un Congrès Année : 2008

Integer and Floating-Point Constant Multipliers for FPGAs

Résumé

Reconfigurable circuits now have a capacity that allows them to be used as floating-point accelerators. They offer massive parallelism, but also the opportunity to design optimised floating-point hardware operators not available in microprocessors. Multiplication by a constant is an important example of such an operator. This article presents an architecture generator for the correctly rounded multiplication of a floating-point number by a constant. This constant can be a floating-point value, but also an arbitrary irrational number. The multiplication of the significands is an instance of the well-studied problem of constant integer multiplication, for which improvement to existing algorithms are also proposed and evaluated.
Fichier principal
Vignette du fichier
constmult.pdf (130.11 Ko) Télécharger le fichier
Origine Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

ensl-00269219 , version 1 (02-04-2008)

Identifiants

Citer

Nicolas Brisebarre, Florent de Dinechin, Jean-Michel Muller. Integer and Floating-Point Constant Multipliers for FPGAs. International Conference on Application-Specific Systems, Architectures and Processors, 2008, IMEC, Jul 2008, Leuven, Belgium. pp.239-244, ⟨10.1109/ASAP.2008.4580184⟩. ⟨ensl-00269219⟩
134 Consultations
549 Téléchargements

Altmetric

Partager

More