Linear (order-1) function evaluation schemes, such as bipartite and multipartite tables, are usually effective for low- precision approximations. For high-output precision, the lookup table size is often too large for practical use. This brief investigates the so-called (M,p,k) scheme that reduces the range of an input argument to a very small interval so that trigonometric functions can be approximated with very small lookup tables and a few additions/subtractions. An optimized hardware architecture is presented and implemented in both a field-programmable gate array device and standard-cell-based technology. Experimental results show that the proposed scheme achieves more than a 50% reduction in total chip area compared with the best linear approach for a 24-bit evaluation.