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Conference Papers Year : 2010

Floating-point exponential functions for DSP-enabled FPGAs


This article presents a floating-point exponential operator generator targeting recent FPGAs with embedded memories and DSP blocks. A single-precision operator consumes just one DSP block, 18Kbits of dual-port memory, and 392 slices on Virtex-4. For larger precisions, a generic approach based on polynomial approximation is used and proves more resource-efficient than the literature. For instance a double-precision operator consumes 5 BlockRAM and 12 DSP48 blocks on Virtex-5, or 10 M9k and 22 18x18 multipliers on Stratix III. This approach is flexible, scales well beyond double-precision, and enables frequencies close to the FPGA's nominal frequency. All the proposed architectures are last-bit accurate for all the floating-point range.They are available in the open-source FloPoCo framework.
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Dates and versions

ensl-00506125 , version 1 (27-07-2010)


  • HAL Id : ensl-00506125 , version 1


Florent de Dinechin, Bogdan Pasca. Floating-point exponential functions for DSP-enabled FPGAs. International Conference on Field-Programmable Technology, Dec 2010, Beijing, China. pp.110-117. ⟨ensl-00506125⟩
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